Join our team to build the ultra-high speed communication systems of the future!
Role: looking for an expert in design and implementation of digital signal processing (DSP) algorithms for coherent optical transceivers. You will be a core member of the team designing the modem DSP and forward error correction (FEC) in our coherent ASICs working closely with colleagues in RTL design, physical design, ASIC design verification (DV), software, and hardware. The role is at the junction between DSP algorithm design and ASIC RTL design calling for a good understanding of both sides and the ability to map the high-level algorithms to extremely efficient low-power ASIC designs. We generally organize the work so you will be responsible for one or more DSP/FEC blocks and contribute to other DSP/FEC blocks as well as the overall system design and simulations.
Before we tape out the coherent ASIC, you will develop architecture and algorithms for various DSP/FEC functions including design and modelling of fixed point implementation and validation in system simulations.
You will create DSP/FEC block specifications appropriate for RTL implementation. You will work closely and iteratively with the RTL designers, or you may write the RTL code yourself, squeezing out the maximum in power-efficiency by iterating through various design alternatives or variations. You will also support the ASIC DV work to ensure the quality of the final implementation. During the entire creative development process, DSP and ASIC teams work closely together to meet aggressive performance and power consumption targets. When the coherent ASIC is available, you will work with DSP, ASIC, hardware, software, and optical system testing colleagues on bring-up, debugging, and performance optimization of the coherent ASIC and the optical transceivers that are based on it.
Skills and experience The essential requirements for this job include a deep understanding of communications DSP and ASIC design, extensive experience with fixed point and real-time implementation of DSP algorithms (in C++ and ideally Verilog), and hands-on experience (and interest) in ASIC bring-up and debugging. Furthermore, it is highly desirable that you have solid programming skills (C/C++, Verilog, Python, Matlab, SVN, Linux). It will facilitate the learning process and ramp-up if you have experience with coherent transceivers and/or experience interacting with software, firmware, and hardware development. While we don’t have rigid requirements to education, we think a master’s or Ph.D. degree in physics or electrical engineering is a good background for this job.